1. Field
Exemplary embodiments of the present invention relate to a semiconductor designing technology, and more particularly, to a non-volatile memory device.
2. Description of the Related Art
Non-volatile memory devices are memory device that retain data stored therein even though a power source is cut off, and examples of the non-volatile memory devices include a flash memory and a Phase Change Random Access Memory (PCRAM). In particular, a PCRAM is a memory device that stores a data in a memory cell by forming the memory cell of a phase change material, such as germanium-antimony-tellurium (GST), heating the GST to make the GST in a crystal state or an amorphous state. The PCRAM has a data processing rate as fast as a volatile memory device, e.g., RAM.
FIG. 1 is a block diagram of a conventional PCRAM.
Referring to FIG. 1, the PCRAM 10 employs a pumping voltage VPPSA domain, and uses a method of transferring a sensing current through a memory cell D (GST) path under the control of signals BIAS, CLMBL and VCLAMP for current mirror. Herein, although not illustrated in a sensing node VSAI, a voltage latch is coupled thereto, and the voltage latch senses the voltage levels of the sensing node VSAI that vary according to the resistance value of the GST. That is, when the sensing node VSAI is pre-charged with a pumping voltage VPPSA and then the sensing node VSAI is discharged according to the voltage condition Vgs and Vds of a transistor NN for clamping, the voltage latch senses the voltage level of the sensing node VSAI when a current flowing through a transistor P for bias become substantially identical to a current flowing through the transistor NN for clamping.
However, when the GST has a higher resistance value, an RC time constant existing in a memory cell D (GST) path may be affected by the higher resistance. As a result, when the sensing node VSAI is discharged, the conventional PCRAM 10 may take a long time to stabilize the sensing node VSAI.